Physical Design Engineer

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Description:

A Sky Firm International client is seeking an experienced ASIC Design Engineer for digital design & verification of WLAN PHY and SoC functional blocks.

What you will be doing.

  • Work closely with Systems, Software, and RF/Analog teams to develop and enhance the WLAN PHY technology for low-power WiFi SoCs.
  • You will be responsible for architecture, design, and verification of 802.11 a/b/g/n PHY digital IP.
  • Work Closely with the verification and physical design teams to ensure validation and implementation of the design
  • Verify post routing timing and functionality
  • Work with systems and analog teams to define and enhance the PHY architecture
  • Implement and verify RTL changes
  • Define and implement the verification tests
  • Engage in post silicon bring up
  • Define and help manufacturing tests

What you need to work here.

  • 5+ years of experience delivering high-volume designs
  • Highly experienced with digital design in RTL
  • Previous experience with 802.11 PHY design and verification
  • Excellent experience with Verilog RTL design and verification
  • 802.11 protocol experience
  • Working knowledge of C/C++
  • Asynchronous clock domains
  • Low power digital design experience
  • Solid backend experience with synthesis, place and route, and static timing
  • Scripting and test automation experience
  • Excellent analytical skills
  • Ability to debug and solve very complex technical problems
  • MS or PhD

Highlights:

  • Creative and challenging environment
  • Competitive salaries
  • Benefits
  • New technology that is shaping the Internet of Things landscape
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